A practical guide to setting up a scope, finding timing faults, reading processor and communications signals, and comparing drive firing-stage waveforms. Learn to make a trustworthy measurement before drawing conclusions from a trace.
LIVE-DRIVE SAFETY: In a mains drive, the DC bus and inverter switching nodes can be lethal and may float at hazardous common-mode voltage. A standard bench scope probe ground is normally bonded to protective earth. Never clip it to a floating switch node, high-side emitter/source, or DC bus. Never defeat the scope earth. Live power-stage work requires appropriate training, a correctly rated differential/isolated probe and instrument, and the manufacturer's procedure. If unsure, stop and use a safe low-voltage training setup.
01 / What the oscilloscope shows
An oscilloscope plots voltage vertically against time horizontally. It lets you see amplitude, timing, shape, noise, missing events, and relationships between signals. The probe and scope together form a measurement system: probe attenuation, bandwidth, capacitance, grounding, and connection length all affect the result.
Vertical controls
Volts/div: set the vertical scale; keep the full waveform on screen without clipping.
Position: move the trace vertically; it does not change the signal.
Coupling: DC shows the full signal; AC blocks the DC component and reveals small ripple riding on it.
Probe factor: set channel menu to match probe 1×/10× setting or displayed amplitude will be wrong.
Horizontal and acquisition
Time/div: choose enough time to see the event and its context.
Sample rate: enough samples are needed to resolve fast edges; too slow can alias or miss pulses.
Trigger: choose source, edge/slope, and level to stabilize the event. Use single acquisition for intermittent starts or trips.
A stable display is created by triggering repeatedly at the same signal condition. Horizontal position and volts/div are display settings, not circuit values until probe factor is accounted for.
02 / A reliable setup routine
1 · IDENTIFY THE REFERENCERead the schematic and identify signal ground or the two nodes across which voltage is required. Decide whether the circuit is safely earth-referenced or floating.
2 · CHOOSE PROBE AND RANGEUse a probe rated for the voltage, transient, common-mode, and bandwidth. Start with a 10× passive probe for ordinary low-voltage signals when suitable. Match the probe factor in the channel menu.
3 · COMPENSATE AND CHECKConnect the probe to the scope's compensation output and adjust the probe trim (if provided) for a square top. Confirm that attenuation and channel settings agree.
4 · CONNECT SAFELYFor a grounded low-voltage circuit, use a short ground spring or ground lead at the circuit's signal ground; probe the test point. For floating/high-side measurements, use a properly rated differential probe across the two nodes.
5 · CAPTUREStart at a safe vertical range; set time/div for the event. Select edge trigger on the relevant channel, set threshold, then use single-shot to catch startup, shutdown, or a trip.
6 · MEASURE AND RECORDMeasure peak-to-peak voltage, period/frequency, rise/fall time, duty cycle, overshoot, and timing relative to another channel. Save probe type, attenuation, coupling, timebase, trigger, and operating condition.
Never float an ordinary oscilloscope by removing its protective earth. Do not assume an isolation transformer makes every probe connection safe. Differential probes have maximum differential and common-mode ratings, frequency limits, and connection rules; check the probe manual.
03 / RC timing and CT current signals
RC timing / delay circuits
For a first-order RC charge, the time constant is τ = R × C. After one time constant, a step response has moved about 63% of the way from its starting level to its final value; after roughly five time constants it is close to settled. A comparator or processor may switch when that ramp crosses a threshold.
Conceptual capacitor voltage after a step. Real circuits may have multiple poles, clamps, loading, and non-linear thresholds.
To diagnose an RC start/reset/timing network on a safe low-voltage board, capture the capacitor node and the comparator/processor output together. Look for a ramp that starts at the right event, the expected threshold crossing, repeatability, and whether the output changes after the crossing. A stuck-flat ramp can result from an open resistor, shorted capacitor, missing supply, or a node held by another circuit; a ramp that is too fast/slow can result from component drift, leakage, loading, or the wrong reference.
CT = current transformer
A current transformer (CT) produces a secondary waveform proportional to changing primary current, subject to its ratio, burden, bandwidth, and core limits. It cannot report steady DC. On a scope, compare polarity, pulse shape, symmetry, clipping/flattening, and timing against the drive command or a known-good phase. Distortion can come from saturation, an incorrect/open burden path, wiring, or the CT itself.
Never open-circuit a CT secondary while primary current may be flowing; hazardous voltage can develop. Use the specified burden and safe connection procedure. A scope probe is not a substitute for an appropriately rated current probe or isolated sensor interface.
04 / Processor and control signals
Approach a processor as a chain of prerequisites: supply rails → reset release → clock/activity → input state → output command. Use the schematic and expected logic family; a 3.3 V pin must not be assumed to tolerate a 5 V probe stimulus. A scope observes signals; it does not by itself prove firmware is correct.
Signal
What to look for
Possible clue if abnormal
Measurement caution
Logic rails
Correct DC level, ripple, dips during startup/load
Brownout, unstable reset, supply fault
Probe at local decoupling/test point; short ground connection.
Reset
Asserted during startup, then clean transition to inactive state (polarity is circuit-specific)
Reset held active, repeated reset pulses, slow threshold crossing
Verify reset polarity and threshold from schematic/device documentation.
Clock / oscillator
Expected activity and frequency where accessible
No oscillation, intermittent clock, damaged oscillator path
Probe capacitance can stop or shift an oscillator; use a low-capacitance probe or buffered clock output.
Check input and output sides of isolation separately; use a common time reference.
ADC / sensor input
Signal stays within supply rails and changes plausibly with sensor condition
Open sensor, short, reference issue, filter fault
Probe may load high-impedance dividers; compare at the source and ADC pin.
Illustrative relationship only: exact reset polarity, thresholds, clock frequency, and sequencing are device/design-specific.
05 / Data lines and bus activity
UART / serial TX-RX
Look for idle level, start bit, consistent bit periods, data transitions, stop bit, and voltage levels. Trigger on a falling edge for a typical idle-high UART stream. Use decode only after confirming baud rate, polarity, word length, parity, and stop bits.
SPI
Capture clock, data, and chip-select together. Check clock polarity/phase, data setup/hold around edges, activity during select, and whether the selected device replies.
I²C
SCL and SDA are commonly open-drain/open-collector with pull-ups. Both normally idle high; START/STOP, ACK/NACK, and data transitions are interpreted relative to SCL. A slow rise can indicate excess bus capacitance, weak pull-up, or loading; a line held low can indicate a stuck device or short.
RS-485 / CAN / differential
Use the correct differential probe or two matched channels with a safe, approved math method. Inspect differential amplitude, common-mode behavior, termination reflections, and edge timing. A single-ended view may hide a common-mode or polarity problem.
Stylized bus capture: data is stable while clock is high, except for START and STOP conditions. Real captures include rise time and ringing.
Use protocol decode as a convenience, then verify the analog waveform. Incorrect thresholds, poor probe connection, ringing, or slow edges can make decoded bytes misleading. For intermittent issues, trigger on runt pulse, timeout, pattern, or a protocol error if your scope supports it.
06 / Drive firing-stage signals
“Firing signals” can mean gate commands for IGBTs/MOSFETs, SCR trigger pulses, or the logic-side PWM that commands an isolated driver. First distinguish the low-voltage command from the actual device gate-to-emitter/source waveform. Identify the device reference and isolation barrier from the exact schematic.
Conceptual low-side-like timing illustration only. A real half-bridge has complementary behavior, deadtime, switching transients, and floating high-side references. Do not treat this as a live probing diagram.
A safe diagnostic comparison
Use the service documentation to identify the controller command, driver input, driver supply, and gate return reference.
On an approved low-voltage setup, check whether the PWM command exists and whether the driver output responds. Compare corresponding channels/phases under identical conditions.
For a power device gate waveform, measure gate-to-emitter/source at that device using a correctly rated differential/isolated probe. A high-side gate is not referenced to controller ground.
Compare pulse amplitude, width, repetition, missing pulses, rise/fall behavior, ringing, undervoltage behavior, and deadtime against the design/manufacturer reference.
Correlate driver fault/desaturation/enable signals. If command is present but output missing, investigate driver supply, isolation, interlock, protection, and gate network before condemning the power module.
Never attach a standard earth-referenced probe ground clip to an IGBT emitter, MOSFET source, half-bridge switch node, DC+, or DC− unless the instrument/probe manufacturer explicitly documents a safe method for that exact setup. Differential probes also have strict differential, common-mode, transient, and CAT ratings.
07 / A repeatable fault-finding workflow
State the question before probing: “Is the reset released?” “Does the driver output follow the PWM input?” “Does the CT pulse saturate?”
Draw or note the reference point and expected waveform from a schematic, datasheet, service manual, or known-good board.
Select probe type and connection based on voltage, reference, frequency, and isolation. Check ratings and scope/probe setup.
Choose trigger and timebase that capture the event, including enough pre-trigger history for startup and trips.
Capture at a known operating condition and save the waveform with settings, probe, and load condition.
Compare the signal at source and destination to find where it changes: controller → isolator → driver → gate/device. Change one variable at a time.
Do not infer a failed component from one waveform alone. Confirm with de-energized checks, datasheet limits, and a known-good comparison.
Primary references
Use the operating manual for your exact scope/probes. These manufacturer guides explain the principles covered here.